From RTL to Silicon: A Practical View of the ASIC Design Flow
An electronic system rarely starts in its finished state. They evolve as performance demands increase…
Author: Bhanu Prakash Yakkaluri
Bhanu Prakash Yakkaluri is an RTL Design Manager with over 15 years of experience in ASIC/SoC design and implementation. He has worked on complex HPC processor-based SoCs, including designs based on Arm Neoverse V2. He has contributed across the complete frontend design flow, from micro-architecture to RTL design and functional verification. He has delivered multiple successful tapeouts across technology nodes ranging from 180nm to 5nm. His expertise includes clock and reset architecture, SoC integration, multi-clock domain design, and CDC/RDC analysis. He is proficient in synthesizable RTL design, netlist verification, and automation using Perl scripting. He has strong knowledge of high-speed industry-standard protocols such as IEEE 802.3ae, IEEE 802.11 MAC, and eUSB, AMBA Bus Architectures
