Author: Haneefuddin Ahmed Khan Mohammed

Haneef is currently serving as Vice President – Engineering (VLSI Physical Design) at MosChip Technologies Ltd. With 25 years of experience in ASIC and VLSI design, he brings deep and broad expertise across the semiconductor development lifecycle. His hands-on contributions span RTL design, design verification, silicon bring-up (wafers and packaged parts), DFT, physical design, and sign-off. In addition, he has played a pivotal role in the software validation and quality assurance of broadband (CPE) ADSL chipsets developed by Analog Devices Inc. Throughout his career, Haneef has been involved in more than 25 successful tape-outs across multiple technology nodes, down to 3nm, for leading foundries including TSMC, Samsung, UMC, and SMIC. He has also led and technically managed several large-scale VLSI design projects, overseeing teams of over 100 engineers. His leadership spans both product development and semiconductor services, having held key roles in prominent companies such as MoSys (now Peraso), Ikanos Communications (now Qualcomm), Analog Devices, and Juniper Networks. Haneef's expertise extends from block-level to complex hierarchical and flat chip designs, including mixed-signal design and networking/processor applications. He has global experience managing cross-site teams and has also spent approximately two years working in the United States, further enriching his international industry exposure.