MosChip®

Neural Network Compiler for Edge devices

A case study of AI Engineering
The market for low cost, high-performance FPGA design solutions is growing increasingly competitive. As a new generation of Edge applications emerges, designers are increasingly pressed to develop solutions that combine low power and small form factor and still achieve increased performance demands. The leading U.S. based low-cost programmable logic provider offering solutions across the network from the Edge to the Cloud across the industries such as growing communications, computing, industrial, automotive and consumer markets was looking to build Neural Network Compiler to run deep learning applications on their FPGA platforms. The client approached Softnautics for building an efficient Neural Network Compiler which supports different FPGA platforms. Neural Network compiler is very user friendly and generates optimized code for the given platform. Subsequently, by using the right engines for the right tasks and devices Softnautics provided a user friendly robust and scalable compiler with the optimal levels of performance. They were able to keep the engineering schedules on track to deliver the designs as scheduled for meet their market commitments
  • Reduced time-to-market
  • Flexible and easy to use software
  • 2x performance optimization
  • 7+ well known model architecture support

Neural Network Compiler for Edge devices

A case study of AI Engineering

The market for low cost, high-performance FPGA design solutions is growing increasingly competitive. As a new generation of Edge applications emerges, designers are increasingly pressed to develop solutions that combine low power and small form factor and still achieve increased performance demands. The leading U.S. based low-cost programmable logic provider offering solutions across the network from the Edge to the Cloud across the industries such as growing communications, computing, industrial, automotive and consumer markets was looking to build Neural Network Compiler to run deep learning applications on their FPGA platforms. The client approached Softnautics for building an efficient Neural Network Compiler which supports different FPGA platforms. Neural Network compiler is very user friendly and generates optimized code for the given platform. Subsequently, by using the right engines for the right tasks and devices Softnautics provided a user friendly robust and scalable compiler with the optimal levels of performance. They were able to keep the engineering schedules on track to deliver the designs as scheduled for meet their market commitments
  • Reduced time-to-market
  • Flexible and easy to use software
  • 2x performance optimization
  • 7+ well known model architecture support
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