ASIC RTL Engineer Requirements Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC….
Multimedia – Video Device Driver Development Engineer Responsibilities The successful candidate(s) will be responsible for: Development and productize various video codecs solutions on Qualcomm processors for mobile/IOT/Automotive projects Enhance video, imaging Firmware solutions and help with video, imaging hardware subsystem enhancements in future Qualcomm Mobile Processors Design of video, imaging features and work with a…
Physical Design Engineer Requirements He/She should be able to do top-level floor planning, PG Planning, partitioning,placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. He/She should have worked on 65nm or…
Design Verification Engineer Requirements Develop verification testbench components for chip/module level using System Verilog, C/C++. Use Verification methodologies (Object oriented, UVM etc) to develop extendable test-bench/test-cases environment. Define and execute detailed verification plan from spec working with architects, designers, system engineers. Write tests, Debug tests, automate regression scripts and regression environment. Incorporate code-coverage, functional coverage,…
