MosChip Academy of Silicon Systems & Technologies Private Limited(formerly known as MosChip Institute of Silicon Systems Private Limited), is one of the established VLSI training institutes in India started by technocrats having 35+ years of VLSI industry experience. With a center in Hyderabad, MosChip Academy of Silicon Systems & Technologies Private Limited (MAST) offers comprehensive industry-oriented training programs in Physical Design, Design Verification, Analog Layout, and Embedded Systems. With the changes in the semiconductor industry landscape, the skill requirements of the industry have also changed drastically. The educational institutions in India with static methods of teaching are not able to provide well-trained human resources as per the industry requirements. Updating the skill-set of the students as per the industry requirements has become mandatory. Our training programs are designed to bridge the gap between the industry requirements and the student’s skill set. Our industry-focused training programs are designed and developed by the industry technocrats to focus on the overall development of the candidates by enhancing their behavioral and technical skills, making them job-ready. Our courses lay emphasis on the fundamental knowledge of VLSI and how it can be used to implement best design practices. In the short span of time, MosChip Academy of Silicon Systems & Technologies Private Limited has become a premier institute providing job-oriented VLSI training to students making them industry-ready engineers.
MosChip Academy of Silicon Systems & Technologies Private Limited (MAST) was started with the sole motto of identifying the needs of the industry to deliver technically trained engineers. We are committed to our students for providing high-quality training in current technologies and future technologies and making them industry-ready to face any challenges.
MAST offers job-oriented courses designed by industry technocrats keeping in the mind the ever-growing skillset demand of the industry.
Prerequisites for our courses: B.E/B.Tech in ECE/EEE, M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics
Introduction to Digital Systems and Number system, Logic gates and Conversions, Min and Max Terms, K-Maps,
Combinational logic: Alternate designs in Combinational circuits, Dataflow Model: Mux design and code, higher order mux using instantiation, encoders and priority encoders, dual and triple priority encoders design,
Sequential circuits : FF Modeling from the inverter blocks, FF Operation and characteristic table and conversions, D-FF Waveform analysis, (D-FF based) Analysis and waveform representation, Shift Registers Operation (SISO,SIPO,PIPO), classification, and Usage, USR design aspect, modes of operation. FIFO: Functionality and Synchronous FIFO Verilog code and logic aspects
Counters: Design of 3-bit Synchronous Counters using D,T and JK -FLIPFLOPS, MOD Counter Design, individual FF outputs as clock values, Custom clock generation,
FSM’s: FSM: Mealy and Moore Hardware Perception, Truth Table to FSM, FSM as Circuit. FSM Modeling for sequence Detector, Set-up and Hold-Times in Sequential circuits, Delays, Task and Function,
Verilog for Verification : Task and Functions, fork-join.
BASIC ELECTRONICS: Electronic Basics, Diode and Transistor operation, Clippers, Clampers, Circuit Theory Basics, Circuit Simplification, Analysis of RC Circuits.
DIGITAL: Combinational Logic-Mux, Comparator, Decoder and Encoder, Digital Gates Implementation Using Mux, Transmission Gates and Pass Transistor Logic.
UNIX – LINUX- EDA – PV FLOW : Basics of Unix/Linux Commands, EDA Tool, PVS and Assura Flow.
CMOS PROCESS: Fabrication, Design of CMOS schematics and Stick Diagrams, MOSFET Characteristics, MOS as Capacitor, Second Order Effects, Latch-Up.
DEVICES, DEVICE PARAMETERS – LAYOUT : Types of Resistors and Capacitances, Layout of Inductor, Diode and Transistor, MOSFET Device parameters, Fingers and Multipliers, Chirality, Device Orientation, Guard ring, Importance of Signal and Current flow.
ANALOG CIRCUITS: Single stage Amplifiers, Current Mirror, Level Shifters, Differential Amplifier, Op-amp, Band gap reference, DAC, PLL.
ANALOG LAYOUT DESIGN TECHNIQUES: Isolation Techniques, STI, LOD, WPE, Matching Techniques, Parasitic Capacitance and Resistance, Importance of better Routing, Cross Talk and Shielding, Tie-Hi, Tie-Lo, P-Cell Creation, Basics of Skill Language and its importance.
ADVANCED ANALOG LAYOUT CONCEPTS: DFM – EMIR, Supply/Ground bounce, Self Heating & Metal Density Effects, Decap, ERC, Antenna, Electrostatic Discharge, Introduction to FINFET.
ANALOG DESIGN CONCEPTS AND SIMULATION: Basics of Analog design and practical simulation of a sample block with extracted net list.
RC Circuits: Lumped matter discipline, distributed matter discipline, delay of wire, Energy, power, average power, peak power, RC delays.
Digital Abstraction: Digital communication, forbidden region and noise margin in digital representation, Logic 0 noise margin and Logic 1 noise margin, representation of VOH, VIH, VIL, VOL, Static Discipline.
MOSFET: S Model, SR Model, MOSFET Characteristics, Power consumption in logic gates, CMOS logic
CMOS process: Fabrication, Design of CMOS schematics and Stick Diagrams, standard cell
Digital Circuit Speed: Different drive strengths, timing Arcs, switching rate vs propagation delay of gate, wire delay vs buffer insertion.
Combinational Circuits I and II: Potential problems in netlist, all combinational circuits- Mux, Comparator, Decoder and Encoder, Transmission Gates and Pass Transistor Logic, tristate gates, Adders, CMOS implementation of adders, sizing of CMOS adders.
Sequential Circuits I and II: Latch, Flop, timing arcs and constraints, setup and hold requirements, Slacks, problems on setup and hold slacks with skew and jitter, global skew and local skew.
TCL Scripting Assignments
Design problems, when circuits get asynchronous & Chip reset: Design problems on timing diagrams, Frequency divider, duty cycle, when events are synchronous, metastability, 2-stage synchronizer, MTBF, recovery, and removal times
Fundamentals of STA I: Inputs of STA, types of timing paths, SDF, LEC, SDC constraints, timing exceptions.
Logic Synthesis: Synthesis Flow and inputs, Wireload models, interpolation, extrapolation, low power synthesis techniques- ICG, multi-Vt, DRVs, synthesis strategy- flat, hierarchical synthesis, registering in – registering out, buffering in – buffering out, genus local attributes, optimization techniques, synthesis scan, physical synthesis, incremental synthesis, netlist uniquification, synthesis test cases.
Physical Design: Inputs for PNR, PNR Terminology, Partitioning, floorplan guidelines – blockages, Power planning- Power requirement for chip, chip top level (IOPADS, POWER PADS) and block level power distribution mechanism, level shifters, placement- timing driven placement, congestion fixing techniques, CTS, macro model, skew groups, routing, OCV, Parasitic extraction corners, Crosstalk analysis.
Fundamentals of STA II and miscellaneous concepts: Half cycle paths, multi-cycle paths, clock domain crossing, min-max delays, STA test cases, metal density rules, Antenna effects, Spare cells, ESD, TIE HI, TIE LOW cells, well taps, filler cells, latch up, bond pads, FINFET.
Advanced C programming:
Introduction to C, Elements of C, Operators, Type casting, Flow Control Statements, Functions, Arrays, Pointers, Dynamic Memory Allocation, Strings, Structure, Union, enum, Qualifier, Storage Classes, File handling, Command line arguments, Bit-Manipulation, Typedef, Macros, Executable file format, Compilation stages, Debugging Techniques, Make utility and multi–file programming. Data Structure: Arrays, Single & Double Linked List, Stack, Queue, Sorting Techniques.
System Programming:
OS architecture, Linux Interfaces, Shell, Services, Utilities, Applications, Libraries, Construction of libraries, File System, API’s and System Calls, Process Control, Signals, process Scheduling, IPC and Synchronization Mechanisms, multi thread programming, Memory Management, race condition, deadlock, starvation, High Performance, Secure coding through OS features, Client-Server communication using Socket Programming.
Kernel and Device Drivers:
Kernel Architecture, Kernel source tree overview, Kernel configuration, Compiling and booting the Linux kernel, Virtual file systems /proc and /sysfs, Concurrency and Race condition handling, Kernel API’s. Device Drivers: Types (character, block & network), classes, Makefile, Kernel module programming, module parameters, Character Device Driver implementation, IOCTL, interrupts, kobject, ksets, mmap, ioremap, kmap, platform_device, platform_driver, Adding own driver to kernel tree using Kconfig and Makefile modifications.
Embedded Linux :
Embedded Hardware & Software, Booting process of X86 Vs Embedded Linux, Installing a cross-compile tool chain, Configuring & Cross compiling of Linux kernel, Root file system, Device Tree, Boot time optimization, Embedded Linux Build System-Buildroot, Yocto.
Our Analog Design course covers key topics such as transistor operation, biasing techniques, small-signal modeling, amplifier design, frequency response, feedback principles, and noise analysis. Students will also learn about operational amplifiers, analog filters, and data converters. Practical assignments and projects ensure students gain hands-on experience in designing, simulating, and analyzing analog circuits, preparing them for real-world applications in analog electronics.
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