Author: Ramakrishna Reddy Amudalapati

Ramakrishna Reddy Amudalapati has more than 20 years of experience in ASIC, IP, and SoC design verification, along with substantial work in functional verification, production test vector development, and execution. His expertise spans multiple ASICs and SoCs, covering complete verification cycles at RTL, gate level, and post-layout stages, followed by production test vector development and validation. His technical background includes deep familiarity with multiple protocols, including USB 1.1, USB 2.0, USB 3.0, PCIe, SATA, HDCP, HDMI, and 10/100 Ethernet protocols. Ramakrishna has led verification architecture and micro-architecture development and has designed a wide range of functional models, including USB host, hub, and device controller BFMs, UTMI-based OTG and UVC models, HDMI-HDCP models, and a PCIe-to-display controller model. His expertise also includes RTL design for the OHCI master and slave operational blocks and the HDMI-Rx HDCP authentication logic. He has overseen functional production test vector development and coverage analysis across several ASIC programs such as MCS7710/11/15/20, MCS7780/7784, MCS7830, MCS9735, and MCS9950.