Advancing Technology Nodes: The Era of Divergent Scaling
For more than five decades, the semiconductor industry advanced along a remarkably predictable path…
Author: Raghuveer Reddy
Raghuveer serves as a Manager, Physical Design at MosChip Technologies Ltd. He holds a Post Graduate degree from JNTU University, Hyderabad, with over 14 years of industry experience across 64 nm, 28 nm, 14 nm, 10 nm, 7 nm, 5 nm, and 3 nm technology nodes. Has delivered complex semiconductor designs from early implementation through final signoff across multiple product cycles. His expertise centres on Physical Design and signoff, with a proven track record in resolving critical timing challenges, navigating dense interconnect constraints, and driving convergence across performance, power, and yield for both wire-bond and flip-chip design methodologies.
