ASIC/SOC VERIFICATION

MosChip over last few decades have emerged as leading ASIC/SoC verification on house with the capabilities with the capabilities in IP verification. Block/Sub system level verification with multiple clocks, power domains and speed up to 1.2 GHz.

Apart from these our expertise on RTL design, FPGA devices and associated tool flow; SoC verification languages(HVL); ASIC Prototyping and post silicon validation combined with strong understanding of peripheral system level deployment and industry standard verification.

MosChip has also proven themselves in turnkey verification ODC’s for semiconductor product comprising globally. Combining our expertise in ASIC design verification and advanced verification, MosChip also offers a portfolio of custom verification IP’s for standard interfaces for various industries.

Depending on the customer requirement MosChip can architect and design custom made flow. From MosChip expertise you can get:

 Verification Audits

  • Verification Audits at all level to find and address the verification Gaps.
  • Suggestion of methodologies and working closely with the team.

Digital Verification

  • Levels
    • Block/Unit
    • Cluster/Sub system level
    • Full Chip/SoC level
  • Methodologies
    • Dynamic & Static Verification
    • Proficient usage of advanced concepts like eRM/OVM/UVM(1.1) methodologies.
    • System Verilog, C and Assertion based verification.
    • Metric driver verification concepts.
  • Modeling Capabilities
    • Test bench development
    • Development of BFMs, Protocol monitors and checkers
    • Functional and code coverage analysis
    • Verification IP development

Low Power Verification & CPF/UPF Flows

Analog Verification

  • AMS modeling
    • Verilog
    • Verilog-A
    • Verilog-AMS
    • wReal
  • Methodologies
    • Big A/Small D verification
    • Analog assertions
    • Metrics Driven Verification using UVM-MS (with 1.1)

Verification IP (Analog centric)