ASIC/Soc Design

The offerings from MosChip in ASIC/SoC design is a complete cycle from conception to manufacturing. Our ASIC design capabilities, includes complex system-on-chip design for low power and high performance.

With unique combination of silicon and system, experience top notch product development. MosChip’s robust internal design flow & low power design expertise, FPGA design, pre-and post-silicon validation. In addition, our IP portfolio accelerates the development of ASIC in market. MosChip also integrates peripheral and memory interfaces, process and analogue IP.

Our team has comprehensive domain expertise in

  • 20+ ASIC tapeouts.
  • First pass Silicon Achievement
  • 100% on-time delivery
  • 100% focused consulting
  • FPGA to ACSI transition
  • 40nm TSSMCLP Design
  • 28nm TSMCLP verification (test chip)
  • 55 nm gate density largest design.

MosChips extensive ASIC design experience ranges from architecture to netlist. MosChip provides the seamless integration of digital and analog IP. Design are optimised for internal performance and external high speed interfaces.