- Early adopters of advanced ASIC Verification methodologies like VMM, OVM & UVM.
- Define and Implement the ASIC/SoC/IP verification Architecture using System Verilog and VMM/OVM/UVM.
- Expertise in ASIC/SoC verification flow includes RTL, Gate level, and Low power verification.
- Developed Scalable, Configurable, & Reusable Verification test bench using verification Methodologies and expertise in coverage driven verification (code & functional) and constraint random test generation techniques.
- Target to achieve 100% code and functional coverage for the functional verification sign-off.
- Verification environment automation using Scripts to improve productivity
- Successfully verified 20+ ASICs and few embedded processor (ARM) based SoCs.